The present invention generally relates to a random access memory having a redundancy repair circuit.
In recent years, a redundancy repair circuit is often used in DRAM to replace defective normal memory cells with spare memory cells.
However, in conventional DRAMs, when the defective normal memory cells are replaced with the spare memory cells, the total resistance value between the precharged node and the grounding potential is substantially changed in accordance with an address signal. As a result, the operation timing of inner circuits is deviated, thereby causing the DRAMs to malfunctions.